Technical & Editorial

AVR – Audio Video Receiver – Build Quality: Part III – Component Choices for a High Performance Design


Conclusions about LSI AVR Block Diagrams

Performance limitations arise from interconnections of subcomponents in the LSI AVR chip. Alongside the performance deficit of each subcomponent, compared with its SSI counterparts, distortion of the chip is significantly higher.

A block diagram of the LSI AVR chip with the signal routing from the selector switch to the two-channel ADC is not presented. The ADC path is operative when the DSP signal processor functions are enabled, as opposed to the direct-mode stereo path. I will present the block diagram in a potential companion piece that comments on the quality of ADCs in AVRs and Pre/Pros.